โ† VLSI Design learning path
VLSI Design ยท Module 8 of 10

Physical design

Turning the netlist into a real chip layout.

๐Ÿ“– Key ideas

  1. Physical design (PD) creates the layout used for manufacturing.
  2. Steps: floorplanning, placement, clock tree synthesis (CTS), routing.
  3. Checks: DRC (design rules), LVS (layout matches schematic), timing and power.
  4. The final layout file (GDSII or OASIS) goes to the fab: this is tape-out.
  5. Open-source flows like OpenROAD let students try PD.
๐Ÿ’ก Real-life example: Like arranging furniture and wiring in a new house: plan the rooms, place furniture, run wires, then pass the inspector's checks.
FloorplanPlanning where big blocks go
CTSClock tree synthesis
DRCDesign rule check
Tape-outSending the final layout to the fab